Weekly outline

  • Objectives

    Autumn 2017 Classroom 

    8h-10h : INM010 (theory)

    10h-12h: INF 3 (laboratories)

    Extra laboratory session: Wednesday 17h-19h INF 3


    Embedded Systems (ES)

    This course is oriented hardware and interfaces. It presents in details the different parts of an embedded system based on micro-controllers and/or FPGA.
    • The introductory part present the overall of the course and some recall on VHDL. Some low level element are presented.
    • The first section describe a specific microcontroller, this year the MSP430 family, and some programmable interfaces. A simple Microcontroller is studied and its use is emphasized in the course with the help of laboratories. The MSP430, a modern very low power micro-controller is used as practical study case.
    • The second section present the design of an embedded system on FPGA. FPGA hardcore and softcore embedded processors are described and used in laboratories. Conception methodology of some programmables interfaces architecture is put in application with practical works in VHDL on FPGA.
    • The third section explain the different parts of an embedded system, with standards parallel and serial bus, processor bus (asynchronous, synchronous) common and divergent characteristics. Main goal for this part is the comprehension of programmable interfaces and specifically master unit. LCD and camera controller will be realized as exercises and laboratory.
    • The fourth section introduces an ARM9 processor interfaced with the FPGA4U board by a proprietary bus. This 32 bits RISC micro-controller allows to study a more complex embedded processor with more complex programmable interface. The ARM board control the FPGA. The FPGA is used as specific programmable interfaces for specific control. An optional laboratory is proposed as mini-project.
    • The fifth and last section will be a mini-project combining the topics studied along the previous sections. As example, this experiment allows the students to be able to design a master programmable interface on FPGA. A LCD display or a camera module is interfaced by a DMA controller on the FPGA, or a RF module is interfaced with the MSP430 and the FPGA can control it. The ARM9 can access the FPGA as a specific accelerator or programmable interface.
    Groups of laboratories are associated with each main topics.
    At the end of semester, students will be able to design an embedded system based on micro-controller and FPGA. Design parts in VHDL and program it in C.

    Content

    • Introduction
    • Micro-controller and associated programmable interfaces
    • Micro-controller and FPGA Embedded Systems conception
    • FPGA based Embedded system
    • Hardcore/softcore processors
    • FPGA embedded processor, i.e. NIOS II
    • Memory organization, little/big endian
    • Synchronous/asynchronous bus, dynamic bus sizing
    • Processors bus
    • Design of Specialized Programmable Interfaces as slave and master
    • Resume of VHDL bases
    • Serial bus
    • Basic on graphical screen and CMOS camera
    • SOC-FPGA, ARM-A9 - FPGA CycloneV

    Grade evaluation:

    Rules:

    • 4 laboratories assignments are provided during the semester as reports.
      • 3 first  laboratories will count as 10% each.
      • The last laboratory is a mini-project and will count for 20%. It will include a final demonstration the last week of the course, an oral presentation per group, and the report.
    • An oral final exam in January to evaluate the theoretical part of the course.

    All the laboratories are counted as 50% of the final grade
    The final exam count for 50% of the final grade


  • 18 September - 24 September


    Introduction (1h Lecture)

    • General system embedded system view
     

    MSP430 microcontroller programmable interface (1h Lecture)

    • Introduction on a Microcontroller
     

    MSP430 and programmable interface (2h Laboratory --> IN3)

    • MSP430 and Code Composer Studio environment
    • GPIO, Clock
       
    • 25 September - 1 October


      MSP430 microcontroller programmable interface (2h course)
      • Programmable interfaces on MSP430
       
      MSP430 and programmable interface ( 2h Laboratory)
      • MSP430 and Code Composer Studio environment
      • Timer + PWM, ADC, SPI, Watch Dog
       
    • 2 October - 8 October


      MSP430 microcontroller programmable interface (1h course)

      • Some serial interfaces protocols (UART, SPI, i2c, LIN), first part
      • Come with your questions and problems on the topic.


      MSP430 and programmable interface (
      3h Laboratory), last time to finish

        • From A/D to PWM by interruption
           
          Report by group for this final part laboratory .
          Analogue input --> PWM control, sampling by timer interrupt

          Explain and justify your choices !
          Normally  1-2 students by group, exceptionally 3.
          Put all student's name in the report file name:
          --->> Student1_Student2_Student3_Report_LabName.pdf (or .doc or .docx)
           
          Delay : see assignments


           


        • 9 October - 15 October


          Embedded system on FPGA (Part I), course (2h)

          • Internal bus for FPGA
          • Avalon Bus, Memory Mapped
          • Bus Sizing
          • Decoding memory on embedded system

          Laboratory

          • Design of a simple slave programmable interface on Avalon for Altera FPGA
          • Starting SOC implementation


        • This week

          16 October - 22 October


          Embedded system on FPGA (Part II)

          • Programmable Interface Design, Parallel Port as an example 

          Design of a Slave Programmable Interface, Laboratory (Part II)

          • Embedded System design from Library on FPGA 

        • 23 October - 29 October


          Course part, serial protocols (1 hour)
          • Some serial interfaces protocols (UART, SPI, i2c, LIN), 2nd part

          Design of a Slave Programmable Interface, Laboratory (Part III, 3 hours Labo)

          Slave interface design, software

          Report: see assignments


          • 30 October - 5 November


            Embedded system on FPGA, master design (Part I)

            • Display or camera controller design , Registers interface (Part 1)
            • Work by groups in the class room

            Design of a Master Programmable Interface, Laboratory (Part I)

          • 6 November - 12 November


            Embedded system on FPGA, master design (Part II)

            2 hour classroom for your questions and project analysis.
            Todo for LCD display controller or camera interface:

            - from the documentation on the LT24 display module and the ILI9341 controller or the TRDB-D5M camera module

            - realize the detailed bloc schematic of the programmable interface, with signals between entity/process
            - realize the detailed memory map and description of the registers
            - realize the memory organization for display buffer, pixels organisation

            - propose an initialization C-code for the LCD or the camera


            Design of a Master Programmable Interface, Laboratory (Part II)
            2 hours
            at laboratory Edit summary

          • 13 November - 19 November


            Embedded system on FPGA, master design (Part III)

            Design of a Master Programmable Interface, Laboratory (Part III)

            Report: see assignments


            • 20 November - 26 November

              Course

              32 bits microcontroller - ARM family + FPGA Introduction part

              • ARM processor family in FPGA-SOC
              • Some programmable interfaces
              • Interface between processor and FPGA,
                • ex. external bus (EBI: External Bus Interface)
                • in the FPGA: ex. AXI bus connection
              • Memory Mapped Communication interface

              Laboratory (Mini-project, 3 weeks + demo): Need QuartusII version > 13.1

              • At the end of the course a more complex conception of an embedded system with choice for the students of one of different topics.
              • Design in VHDL a specialized module and integrate it with a processor and different programmable interfaces. Program in C a small application. Group design of 2~4 students, 4 weeks.
              • Continuation of the LCD/Camera system started with the DE0-nano board but on CycloneV system (DE1-SOC including 2 ARM-A9 cores and FPGA part).
                • Implementation of the camera controller unit for an CMOS camera extension module.
                • Implementation of the LCD master interface
                • Integration on the SOC-DE1 board
              • 27 November - 3 December


                Laboratory 4h (Miniprojects)

                32 bits microcontroller - FPGA-ARM CycloneV family 

                • Camera or LCD design implementation
                  • ARM-A9 control of the modules
                • Usefull link for software example for LT24:
                • \\lapsrv1\documentation\Altera\DE0-nano-terasic\LT24_v.1.0.1_SystemCD\Demonstrations\DE0_Nano_SDRAM_LT24_Painter\software\LT24_Test\graphic_lib

              • 4 December - 10 December

                Laboratory

                • Time for your mini-project


                • 11 December - 17 December



                  Laboratory

                  • Time for your mini-project
                    • 18 December - 24 December


                      MiniProject

                      Laboratory

                      • Oral presentation per group
                      • 15' max. 
                        • 5' Overall architecture of your mini-project
                        • 5' A specific part detailed
                        • 5' Question and demo


                      Report delay: see assignments