Autumn 2018 Classroom
8h-10h : INM010 (theory)
10h-12h: INF 3 (laboratories)
Extra laboratory session: to be defined
Embedded Systems (ES)
- The introductory part present the overall of the course and some recall on VHDL. Some low level element are presented.
- The first section describe a specific microcontroller, this year the MSP432 family, and some programmable interfaces. A simple Microcontroller is studied and its use is emphasized in the course with the help of laboratories. The MSP432, a modern very low power micro-controller is used as practical study case. It is based on an ARM Cortex M4F core.
- The second section present the design of an embedded system on FPGA. FPGA hardcore and softcore embedded processors are described and used in laboratories. Conception methodology of some programmables interfaces architecture is put in application with practical works in VHDL on FPGA.
The different parts of an embedded system, with standards parallel and serial bus, processor bus (asynchronous, synchronous) common and divergent characteristics are specifically used.
- The third section has the goal of the the comprehension of programmable interfaces and specifically master unit. LCD and camera controller will be realized as exercises and laboratory.
- The fourth section and last section will be a mini-project combining the topics studied along the previous sections. As example, this experiment allows the students to be able to design a master programmable interface on FPGA. A LCD display or a camera module is interfaced by a DMA controller on the FPGA. The ARM-A9 can access the FPGA as a specific accelerator or programmable interface.
At the end of semester, students will be able to design an embedded system based on micro-controller and FPGA. Design parts in VHDL and program it in C.
- Micro-controller and associated programmable interfaces
- Micro-controller and FPGA Embedded Systems conception
- FPGA based Embedded system
- Hardcore/softcore processors
- FPGA embedded processor, i.e. NIOS II
- Memory organization, little/big endian
- Synchronous/asynchronous bus, dynamic bus sizing
- Processors bus
- Design of Specialized Programmable Interfaces as slave and master
- Resume of VHDL bases
- Serial bus
- Basic on graphical screen and CMOS camera
- SOC-FPGA, ARM-A9 - FPGA CycloneV
- 4 laboratories assignments are provided during the semester as reports.
- 3 first laboratories will count as 10% each.
- The last laboratory is a mini-project and will count for 20%. It will include a final demonstration the last week of the course, an oral presentation per group, and the report.
- An oral final exam in January to evaluate the theoretical part of the course.
- The groups are composed of 2 students maximum (1 alone is possible)
All the laboratories are counted as 50% of the final grade
The final oral exam count for 50% of the final grade