Weekly outline

  • General

    MESOC Course

    Microelectronics for Systems on chips

    Welcome to the homepage of Microelectronics for Systems on Chips, the elective course in microelectronics

    Responsibles

    Prof. Christian Piguet, René Beuchat

    TimeTable

    Autumn Semester, Friday 13:15 to 17:00

    Room INM201 (course)

    Room INF2  (laboratories)

    Practical Information

    All you need to know to join the course is some knowledge (even weak) about logic design and microprocessors.

    SUMMARY OF THE COURSE

    VLSI technology allows the development of processors and memories. Significant improvements, by a factor 1000 or more, are still expected over the next 15 years. The objective of the course is to understand the influence of technology and mainly power consumption constraints on the architecture of microcontrollers, microprocessors, memories, cache memories, DSP and parallel machines. In any system on chip, memories and buses are very important for achieving speed and power consumption performances.

    PART 1 MICROELECTRONICS (Christian Piguet):

    Chapter 1: Microelectronic Technology

    • History of microelectronics, layout and CMOS design

    Chapter 2: Microelectronic Technology Evolution

    • Evolution of VLSI technologies, ITRS Roadmap predictions (2006-2020)
    • Interconnect delays, Future technologies and new circuit techniques

    Chapter 3: New Design techniques

    • Adiabatic and asynchronous circuits and architectures

    Chapter 4 Low-Power Systems on Chips (Part I and II)

    • Power Consumption at at High level
    • Low-power microcontrollers, RISC microprocessors and DSP processors
    • Low-power memories and cache memories

    PART 2 MEMORIES, BUSES and INTERFACES (René Beuchat)

    • Memories architecture and interfaces
    • Complex dynamic memories
    • Circuit interfaces or parallel and serial buses
    • Personnal work: study and presentation of a specific memory or technology

    EXERCISES

    MicroWind and Dsch

    Several exercises (given at the end of chapter notes) have to be solved by a manual design at the layout (Microwind) and at transistor levels (Dsch), and then the resulting circuits have to be simulated with a very simple electrical or logic “simulator”. This very simple simulator is the analog simulator MicroWind and the gate and transistor simulator Dsch2 from the French school INSA.

    There are two different tools:

    1. MicroWind, Layout Editor and Simulator
    2. Dsch2, a logical editor and simulator (gates and transistors)

    It can be freely charged from the Web at the address:

    The commercial site for Microwind is:

    DOCUMENTS

    [1] D. Soudris, C. Piguet, C. Goutis, Editors of “Designing CMOS Circuits for Low-Power”, Kluwer Academic Press, October 2002

    [2] Christian Piguet, Heinz Hügli, « Du zéro à l’ordinateur, une brève histoire du calcul », Presses Polytechniques et Universitaires Romandes PPUR, février 2004

    [3] Christian Piguet, Editor, « Low-Power Electronics Design”, CRC Press, 2005, ISBN 0-8493-1941-2

    [4] Christian Piguet, Editor, « Low-Power Processors and Systems on Chips”, CRC Press Taylor & Francis, 2006, ISBN 0-8493-6700-X

    [5] Christian Piguet, Editor, « Low Power CMOS Circuits: Technology, Logic Design and CAD Tools”, CRC Press Taylor & Francis, 2006, ISBN 0-8493-9537-2

  • 19 September - 25 September

  • 26 September - 2 October

  • 3 October - 9 October

  • 10 October - 16 October

  • 17 October - 23 October

  • 24 October - 30 October

  • 31 October - 6 November

    Enseignant CP (Christian Piguet)
    • 7 November - 13 November

    • 14 November - 20 November

      Enseignant CP (Christian Piguet)

      • 21 November - 27 November

      • 28 November - 4 December

        Teacher: RB (René Beuchat)


        Only course this morning (4h) wide eyes
        Drink a coffee !

      • 5 December - 11 December

        Teacher: RB (René Beuchat)


      • 12 December - 18 December

        Teacher: RB (René Beuchat)


        4h for starting preparation and personal study of a specific memory (1 or 2 people per group)

      • 19 December - 25 December

        Teacher: RB (René Beuchat)


        1) Presentation by students on specific memories features (4h) 

        ~20 minutes for presentation by groups and 5 min. for questions

        - please send the presentation (.ppt, .pdf) to teacher before previous Friday13h. : rene.beuchat@epfl.ch